Vias are used to interconnected different layers of Multichip Modules (MCM). Numerous processes have been used to manufacture high density interconnect vias. These vias are critical in the manufacture of MCM, which is a growing packaging technology in the electronic field.
Prior to the present invention, to form vias with a thick film additive process, screen printing is used. A dielectric ink is screen printed onto the substrate with openings for the vias. The dielectric ink is fired at high temperatures, and a conductive ink is used to fill the vias before subsequent layers are added. However, the rheology of the dielectric ink is such that its flow causes small via openings of less than 0.008" to close.
Photo-imaging and "diffusion patterning" processes have been developed to address this problem, but these are both subtractive processes, i.e., material must be washed away. This creates a need for expensive capital equipment for the imaging, developing, etching, and dealing with waste created. Additionally, neither process has been used in production on a large scale.
High density interconnects can be formed using thin film sputtering and chemical vapor deposition processes, but these too require capital equipment costing from hundreds of thousands to millions of dollars. Also, thin film processes are unproven in the creation of thick dielectrics needed for reliability.
Therefore it is the objective of the present invention to provide an economical, safe, and reliable means of interconnecting layers on an MCM.